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September 16-17, 2024 | Vienna, Austria
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Monday September 16, 2024 11:10 - 11:55 CEST
This session aims to cover ISA and non-ISA for Confidential VM Environment (CoVE) on RISC-V platforms. The session will describe the use of ratified RISC-V privileged ISA extensions and new priv. ISA extensions called "Supervisor Domains" that are proposed and reaching task group consensus. This session will also describe the specifications for proposed non-ISA/ABI extensions and SoC requirements that enable Confidential Computing on RISC-V-based platforms - and the related open-source activities in open-source that are required to enable the confidential computing stack on RISC-V platforms. The common/abstract aspects that are cross-architectural will be discussed to enable interoperability across different RISC-V and non-RISC-V platforms. A future roadmap of capabilities will be discussed to encourage participation from the community.
Speakers
avatar for Atish Patra

Atish Patra

Linux kernel Engineer, Rivos
Atish is a Linux kernel engineer working at Rivos . He has worked on various features for RISC-V Linux kernel i.e. UEFI, early boot, virtualization and device drivers, confidential computing.
avatar for Ravi Sahita

Ravi Sahita

Security Architect, Rivos Inc.
Ravi Sahita is a Principal Security Architect at Rivos Inc, and vice-chair of the Security HC at RVI. He is an expert in ISA/platform virtualization, trusted execution, and exploit prevention. In past work, he led the security arch. for confidential computing on x86 servers, exploit... Read More →
Monday September 16, 2024 11:10 - 11:55 CEST
Hall L3

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